1. Field of the Invention
The present invention relates to a power semiconductor device having a high voltage structure and a method of manufacturing the same.
2. Related Art
An ON resistance of a vertical power MOSFET greatly depends on an electric resistance of a conduction layer (drift layer). The electric resistance of the drift layer is determined by a doping concentration, which cannot be increased beyond a limit value that is determined by a breakdown voltage of a p-n junction formed by a base and a drift layer. Thus, there is a trade-off relationship between the breakdown voltage of the device and the ON resistance thereof. Therefore, it is important for a low-power-consumption device to optimize both the breakdown voltage and the ON resistance.
The breakdown voltage and the ON resistance each has a limitation that depends on materials of the device. In order to achieve a low ON resistance device superior to the existing power devices, it is essential to alleviate the limitations.
For example, as a MOSFET whose breakdown voltage and ON resistance are optimized, there has been proposed a MOSFET having the so-called superjunction structure which has p pillar layers and n pillar layers embedded in the drift layer. The superjunction structure has a pseudo non-doped layer formed by balancing the impurity concentration of the p pillar layers and that of the n pillar layers. This structure has a high breakdown voltage, and can achieve the ON resistance lower than the limitation depending on the material by flowing the current through the highly doped n pillar layers. The maximum breakdown voltage obtained by precisely controlling the amounts of the impurities in the n pillar layers and the p pillar layers is proportional to the thickness of the drift layer.
As a technique of forming such a superjunction structure, there is a method in which a trench groove is formed in an n-type epitaxial layer, and a p-type epitaxial layer is formed in the trench groove to fill the trench (see Japanese patent Laid-open publication No. 2003-273355). According to the technique, the trench groove having a high aspect ratio can be formed, so that a p pillar having a high aspect ratio can be formed. That is, it is possible to form the superjunction structure having narrow widths and deep trenches. The superjunction structure having narrow widths has a characteristic which tends to be completely depleted at a low voltage. Therefore, it is possible to increase the impurity concentration of the pillar, thereby achieving the low ON resistance. Since the breakdown voltage is proportional to the thickness of the drift layer, the above-mentioned superjunction structure can achieve a superior high-breakdown voltage performance.
As described above, a process combining trench groove formation and embedded crystal growth is effective in forming a superjunction MOSFET having a low ON resistance and a high breakdown voltage. A surface of the MOSFET formed by the process is covered with a p-type epitaxial layer. Therefore, in order to maintain a proper breakdown voltage, at least the p-type epitaxial layer on the surface at the edge of the device has to be removed. In order to surely remove the p-type epitaxial layer on the surface by etching or the like, the p-type epitaxial layer has to be etched excessively, taking etching variation into consideration. Therefore, the superjunction structure after the etching becomes thinner than that immediately after the embedded crystal growth, and the obtained maximum breakdown voltage is lowered.